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Chapter 2 - Part 1 - PPT - Mano & Kime - 2nd EdSlide 1 Lecture 14 Combinational Functional BlocksLecture 14 Combinational Functional Blocks
Slide 2 OverviewOverview Functions and functional blocks Enabling Decoding Encoding Selecting
Slide 3 Functions and Functional BlocksFunctions and Functional Blocks Higher-level functions Common in real designs Simplify design process Add hierarchy and replication Implemented within a functional block. In the past, many functional blocks were implemented as SSI, MSI, and LSI chips. Today, they are often simply parts within a VLSI circuits.
Slide 4 Enabling FunctionEnabling Function Enabling permits an input signal to pass through to an output Disabling blocks an input signal from passing through to an output, replacing it with a fixed value The value on the output when it is disable can be Hi-Z (as for three-state buffers and transmission gates), 0 , or 1 When disabled, 0 output When disabled, 1 output See Example 4-2 in text Adobe Systems
Slide 5 DecodingDecoding - the Conversion of n-bit input to m-bit output Given n £ m £ 2n Circuits that perform decoding are called decoders Called n-to-m line decoders, where m £ 2n, and Generate 2n (or fewer) minterms for the n input variables Decoding
Slide 6 Decoder Examples1-to-2-Line Decoder 2-to-4-Line Decoder Note that the 2-4-line made up of 2 1-to-2- line decoders and 4 AND gates. Decoder Examples Adobe Systems Adobe Systems
Slide 7 Decoder Expansion - ExampleDecoder Expansion - Example Result Adobe Systems
Slide 8 Decoder with EnableIn general, attach m-enabling circuits to the outputs See truth table below for function Note use of X s to denote both 0 and 1 Combination containing two X s represent four binary combinations Alternatively, can be viewed as distributing value of signal EN to 1 of 4 outputs In this case, called a demultiplexer Adobe Systems Decoder with Enable
Slide 9 EncodingEncoding Encoding - the opposite of decoding Conversion of m-bit input to n-bit output Circuits that perform encoding are called encoders An encoder has 2n (or fewer) input lines and n output lines which generate the binary code corresponding to the input values Typically, an encoder converts a code containing exactly one bit that is 1 to a binary code corres-ponding to the position in which the 1 appears.
Slide 10 Encoder ExampleEncoder Example A decimal-to-BCD encoder Inputs: 10 bits corresponding to decimal digits 0 through 9, (D0, …, D9) Outputs: 4 bits with BCD codes Function: If input bit Di is a 1, then the output (A3, A2, A1, A0) is the BCD code for i, The truth table could be formed, but alternatively, the equations for each of the four outputs can be obtained directly.
Slide 11 Encoder Example (continued)Encoder Example (continued) Input Di is a term in equation Aj if bit Aj is 1 in the binary value for i. Equations: A3 = D8 + D9 A2 = D4 + D5 + D6 + D7 A1 = D2 + D3 + D6 + D7 A0 = D1 + D3 + D5 + D7 + D9
No. The total gate input cost remains the same.
Slide 12 Priority EncoderPriority Encoder What if multiple inputs are true? Encoder just designed does not work. Instead, use a priority encoder. Encodes either Most significant input position Or least significant input position
Slide 13 Priority Encoder ExamplePriority Encoder Example Priority encoder with 5 inputs (D4, D3, D2, D1, D0) - highest priority to most significant 1 present - Code outputs A2, A1, A0 and V where V indicates at least one 1 present. Xs in input part of table represent 0 or 1; thus table entries correspond to product terms instead of minterms. The column on the left shows that all 32 minterms are present in the product terms in the table
Go over table explaining how entries were obtained, particularly those containing Xs
Slide 14 Priority Encoder Example (continued)Priority Encoder Example (continued) Could use a K-map to get equations, but can be read directly from table and manually optimized if careful: A2 = D4 A1 = D3 + D2 = F1, F1 = (D3 + D2) A0 = D3 + D1 = (D3 + D1) V = D4 + F1 + D1 + D0 D4 D3 D4 D4 D4 D3 D4 D2 D4 D2
Slide 15 SelectingSelecting of data or information is a critical function in digital systems and computers Circuits that perform selecting have: A set of information inputs from which the selection is made A single output A set of control lines for making the selection Logic circuits that perform selecting are called multiplexers Selecting can also be done by three-state logic or transmission gates Selecting
Slide 16 MultiplexersMultiplexers A multiplexer selects one input line and transfers it to output n control inputs (Sn - 1, … S0) called selection inputs m £ 2n information inputs (I2n - 1, … I0) output Y
Slide 17 2-to-1-Line Multiplexer2-to-1-Line Multiplexer Since 2 = 21, n = 1 The single selection variable S has two values: S = 0 selects input I0 S = 1 selects input I1 The equation: Y = I0 + SI1 The circuit: S Adobe Systems
Slide 18 2-to-1-Line Multiplexer (continued)2-to-1-Line Multiplexer (continued) Note the regions of the multiplexer circuit shown: 1-to-2-line Decoder 2 Enabling circuits 2-input OR gate To obtain a basis for multiplexer expansion, we combine the Enabling circuits and OR gate into a 2 ´ 2 AND-OR circuit: 1-to-2-line decoder 2 ´ 2 AND-OR In general, for an 2n-to-1-line multiplexer: n-to-2n-line decoder 2n ´ 2 AND-OR Adobe Systems
Slide 19 Example: 4-to-1-line MultiplexerExample: 4-to-1-line Multiplexer 2-to-22-line decoder 22 ´ 2 AND-OR Adobe Systems
Slide 20 Multiplexer Width ExpansionMultiplexer Width Expansion Select vectors of bits instead of bits Use multiple copies of 2n ´ 2 AND-OR in parallel Example: 4-to-1-line quad multi- plexer Adobe Systems
Slide 21 Other Selection ImplementationsOther Selection Implementations Three-state logic in place of AND-OR Gate input cost = 14 compared to 22 (or 18) for gate implementation Adobe Systems
Slide 22 Other Selection ImplementationsOther Selection Implementations Transmission Gate Multiplexer Gate input cost = 8 compared to 14 for 3-state logic and 18 or 22 for gate logic Adobe Systems
Slide 23 SummarySummary Functions and functional blocks Enabling Decoding Encoding Selecting with multiplexers
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